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Form 8-K · Current Report · Filed 2026-04-20

Synopsys Approves Amended Equity Incentive Plan

At the 2026 Annual Meeting, Synopsys, Inc.'s stockholders approved the Amended and Restated Equity Incentive Plan, which now includes non-employee directors as eligible for awards.

Filer
Synopsys Inc. SNPS · NASDAQ
Filed
Accession
0001193125-26-164085
CIK
0000883241
Signal
Medium impactTechnology

Details

The meeting also saw the election of ten directors, with Aart J. de Geus receiving the highest votes. Other proposals included the approval of executive compensation and the ratification of KPMG LLP as the independent auditor, while a proposal for stockholder consent by written consent was not approved.

Items reported

Item events

Reported Item

Equity Plan Approved Board Member Appointed General Statement

Market reaction

Close before filing

$449.58

Next session

+4.0%

Since filing

-13.5%

Latest close

$388.76

What happened, not what will happen — closing prices around the filing date.

Precedent

Previous filings from SNPS reporting the same item, with the next session's move:

Insider tape

Within 45 days of this filing, SNPS insiders reported 8 Form 4 transactions — net selling of $309K.

Full SNPS insider history →

About Synopsys Inc.

Synopsys Inc. is a leading provider of electronic design automation software, offering comprehensive solutions essential for designing and testing integrated circuits and electronic systems. Their software facilitates complex chip design processes, catering to a wide spectrum of industries, including semiconductor, automotive, and consumer electronics. One of Synopsys's key offerings is its advanced verification platform, which enhances the reliability and performance of electronic products. The company also plays a pivotal role in advancing chip design technology through its robust intellectual property portfolio, offering Silicon-proven IP that accelerates time-to-market for semiconductor companies. Headquartered in Mountain View, California, Synopsys is integral to the semiconductor design and verification cycle, supporting innovation in various tech sectors. Its tools are indispensable in conducing the unyielding complexity and shrinking design cycles synonymous with modern electronics, underscoring its market significance.

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